Nagare Labs Emerges from Stealth to Break AI’s Memory Bottleneck
Atlanta based spinout raises $5M from Playground Global to build a new memory tier
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Nagare Labs emerged from stealth with $5M led by Playground Global and a new memory technology designed to overcome the most critical hardware bottleneck in AI innovation. Combining density and speed, Nagare’s memory technology promises to make AI compute systems more fluidic, responsive, and economically scalable.
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(L to R): Dr. Shimeng Yu and Dr. Suman Datta of Nagare Labs
A spinout of Georgia Tech, Nagare Labs was co-founded by Dr. Suman Datta and Dr. Shimeng Yu, two of the semiconductor sector’s most accomplished researchers with a track record of creating groundbreaking and commercially successful semiconductor logic and memory technologies. Dr. Datta, Pettit Chair Professor at Georgia Tech, is a co-inventor of Intel’s High-k/Metal Gate and Tri-gate logic transistor architectures and recipient of the 2026 IEEE Andrew S. Grove Award. Dr. Yu, Dean’s Professor at Georgia Tech, is a creator of NeuroSim, the open-source simulator used by researchers worldwide for design space exploration of emerging memory technologies, and recipient of the 2025 SRC Technical Excellence Award.
“Memory performance has lagged behind logic performance scaling, creating the so-called memory wall for modern AI workloads,” said Dr. Suman Datta, Co-Founder of Nagare Labs. “We rethought the memory hardware stack so AI systems benefit from the access bandwidth and bit capacity they need to stay fluidic and responsive while consuming less energy and space.”
“Unlocking the full potential of next-generation AI requires fundamentally rethinking hardware from the memory layer up,” said Pat Gelsinger, General Partner, Playground Global. “Nagare Labs brings together world-class technical leadership and a brilliant architectural design that operates on existing fab infrastructure and is poised to define the next era of memory-centric computing.”
While peak compute performance has surged over the past three decades at 70% annually, memory bandwidth has increased at 20% annually, opening an orders-of-magnitude bandwidth disparity that throttles generative AI inference workloads. Today’s frontier systems are constrained by the architectural divide between logic and memory, forcing chipmakers and hyperscalers into costly tradeoffs. On-die SRAM provides ultra-high bandwidth, but scaling has flatlined consuming prohibitive amounts of expensive logic die area. Off-die DRAM and high bandwidth memory (HBM) provide high capacity, but incur steep latency penalties, thermal strain, and energy waste simply shuttling data across package and interposer interconnects.
The more data has to move, the more time and energy it consumes, and the more it idles costly processors. Scaling requires more chips, racks and interconnects, driving up infrastructure and energy costs for hyperscalers. AI infrastructure requires a new memory tier that combines high speed with high capacity to improve response times, lower costs, and maximize efficiency.
To solve this, Nagare Labs has created Z2RAM, a novel transistor-based capacitor-less architecture that unifies SRAM-like speed and DRAM-level bit density into a single memory tier. Lower power consumption and capacitorless design makes this memory suitable for 3D heterogeneous integration on top of logic die, breaking through the AI memory wall.
Beyond its performance gains, Nagare’s technology is engineered for rapid commercialization and manufacturability. Unlike previous industry attempts at new architectures that stalled due to exotic materials or complex reliability physics, Nagare utilizes standard back-end-of-the-line integration processes and fab compatible materials, tools, and chemicals. Z2RAM architecture is 3D bit cost scalable, allowing multiple layers to be processed with a single lithography exposure without expensive EUV.
To learn more about Nagare Labs and its high-performance memory architecture, visit www.nagarelabs.ai.
About Nagare Labs
Nagare Labs is a deep-tech semiconductor company building memory-centric systems for the AI era. Spun out from Georgia Tech, Nagare Labs accelerates the transition from laboratory research to manufacturable memory chips, delivering high density, high performance, and ultra-low latency for next-generation compute workloads. For more information, visit www.nagarelabs.ai.
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